In the simple example considered above (see example with gcc and example with VC++) there were just a few commands to execute. A real project may contain much more files and libraries. A conventional way to automate build is to use make that reads the description in makefile and then executes the command accordingly.
Let us consider the same example as above but for simplicity all the files will be in the same directory. Yet, the goal is the same – to make a library and then link the main program with it.
The sample code is in make_example.tar.gz or you can browse it here.
1) Unpacking the archive and changing the directory
It is assumed that the archive is already in the current directory.
$ tar zxvf make.tar.gz
$ cd make_example
2) Compiling with gcc
Open makefile. It describes dependencies between different parts. The final binary depends on the object file and the library. The library depends on another object file. The object files depends on the cpp code and on the headers. The command make
$ make
g++ -c -I. main.cpp
g++ -c -I. testlib.cpp
ar cr libtestlib.a testlib.o
g++ -o main.exe main.o -L. -ltestlib
will read by default makefile and makes necessary operation to build main.exe. The difference with a simple script is that now if one make changes in one file, then only changes related to that file will be executed. For example try
$ touch main.cpp
$ make
g++ -c -I. main.cpp
g++ -o main.exe main.o -L. -ltestlib
or
$ touch testlib.cpp
$ make
g++ -c -I. testlib.cpp
ar cr libtestlib.a testlib.o
g++ -o main.exe main.o -L. -ltestlib
Before going to the next step, let us clean the project
$ make clean
3) Compiling with VC++
The makefile to compile with VC++ is in makefile.ms. The main changes are to change the macros defining the compiler and the librarian. Unfortunately it is not enough. Additionally we need to change .o to .obj, .a to .lib and then commands related to making the library and linking, as options are slightly different there. In principle, this could be done by introducing more macros in the original makefile and then the change from gcc to VC++ could be done by just redefining macros. However, such makefiles in practice do not exist and this shows you what should be done to port a Unix makefile to compile the project with VC++.
Now the command
$ make -f makefile.ms
builds the project with VC++ and the command
$ make -f makefile.ms clean
cleans it.
4) More information
A good introduction into the makefile syntax is in the GNU make documentation http://www.gnu.org/software/make/manual/html_node/Introduction.html. Also Wikipedia has a page devoted to make where there are additional links to tutorials: http://en.wikipedia.org/wiki/Make_%28software%29.
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